Unless otherwise indicated herein, the materials described herein are not prior art to the claims in the present application and are not admitted to be prior art by inclusion in this section.
In semiconductor technologies, a three-dimensional integrated circuit is a single integrated circuit built by stacking silicon wafers and/or dies and interconnecting them vertically so that they behave as a single device. The present disclosure appreciates that by stacking the silicon wafers and interconnecting them vertically, various benefits can be realized with respect to the footprint, speed, and/or power of a three-dimensional integrated circuit as compared to conventional integrated circuits.
A through-silicon via (“TSV”) is a conductive feature that passes vertically through the stacked wafers of the three-dimensional integrated circuit and can provide the vertical interconnection between stacked wafers. However, because the stacked wafers are formed from semiconductor materials that are conductive, the present disclosure appreciates that stacked wafers generally need to be insulated from the TSVs that pass though them.